This invention relates generally to processes for the fabrication of bipolar transistor devices, and more particularly, to processes for producing bipolar devices for use at high powers and frequencies. At higher frequencies, extremely shallow junction depths are required, and at high powers large circuit areas are required, since the power output of a bipolar transistor is approximately proportional to the area of its base region. One approach to meeting the requirement for higher powers and frequencies is to employ gallium arsenide (GaAs) technology, which lends itself better to the formation of relatively large and shallow junctions.
Prior to this invention, it has not been possible to achieve ultra-shallow device junctions in bipolar devices employing silicon technology, except in an uncontrollable manner. With relatively large areas in combination with shallow junction depths, there is a very high level of defects induced by processing of the devices.
Ion implantation is a technique that is generally recognized as affording good control of dopant concentration, area uniformity and depth profile. Basically, ion implantation is the introduction of charged atomic particles into a substrate, for the purpose of changing the electrical properties of a selected region of the substrate. The implantation can be performed at low temperature, such as room temperature, but results in crystalline lattice damage. Typically, the lattice damage is removed by annealing, that is to say exposing the device to a high temperature for a prescribed, and usually long period of time. The annealing temperature is typically around 550 degrees C. or higher.
The structure of a bipolar transistor typically includes a substrate that forms the collector, a base region implanted in the collector, and an emitter region implanted in the base region. One phenomenon that induces device defects resulting from these multiple implantation steps, is known as "base push." This results in a non-uniform junction depth. Base push is caused by the second high-temperature annealing step to which the base region is exposed when the emitter is formed. When the emitter is implanted in the base, this may also have the effect of "pushing" the base-collector junction further into the device.
Other defects may also result from high-temperature oxidation steps in the process. Silicon dioxide is a commonly employed material in many processes involving silicon devices. It is typically formed by a process of thermal oxidation, oxygen is reacted with the silicon device at a temperature of several hundred degrees C. or higher. The process may employ dry oxygen, or may be performed in the presence of steam. Steam growth of the oxide proceeds at a faster rate than dry oxygen growth, but temperatures of several hundred to over a thousand degrees C. are required in each process. When very thin layers of silicon are involved, these high-temperature oxidation processes tend to produce defects known as oxidation-induced stacking faults. These show up as irregular "spikes" or other features in a junction surface.
U.S. Pat. No. 4,381,953 discloses a technique in which a single heat cycle is used to anneal multiple ion implantations. However, the process described in the patent also includes a high-temperature oxidation step, and would therefore be ineffective in solving the problem that the present invention addresses.
It will be apparent from the foregoing that normal high-temperature processing of silicon bipolar devices gives rise to uncontrollable defects of various kinds. One cause of defects is the subsequent movement, by diffusion, of carefully defined regions when the device is reheated for subsequent annealing or oxidation steps. Additional problems may be caused by oxidation-induced stacking faults. It will be appreciated that there is still a need for improvement in the processing of bipolar silicon devices, so that ultra-shallow junctions can be attained in a reliable and repeatable manner. The present invention is directed to this end.